Design and layout of a 4-bit ALU in Cadence

The final link in the chain. For the past few years, I have been fascinated by how simple logic could be built up to form such complex digital systems. Why not take a step further and build up from CMOS transistors?

Design and layout of a fully-differential op-amp w/ CMFB in Cadence

Many late nights were spent in Kelley Engineering Center getting this thing to meet spec. What a challenge. What a reward! No other class have I taken where all the students gathered regularly to overcome such a major obstacle.

Exploring and implementing threats against Wi-Fi security protocols

Not only did I learn in-depth how Wi-Fi security protocols work and what their vulnerabilities are; it was a pretty good excuse to buy an adapter and learn how to attack (my own) network. Pretty cool stuff! Here you can see I've set up a rogue access point and sniffed packets from my smartphone when connecting to it.

Fall 2023

Designing a CMOS differential op-amp in Cadence

We did it... After nearly three years of working with these things, we can finally say that we know what an op-amp is. Op-amps have always been the butt of the joke when it comes to things we really should understand as ECEs, but don't. Well, no more! The tangled web of transistors we used to gawk at in Junior Design is not such a mystery anymore.



The goal of the project was to design a CMOS op-amp that meets a list a criteria. The first couple times my partner and I met to work on this, we felt like we were hitting dead ends. Drain-source currents, transconductances, device sizes... you have to juggle these variables across all the transistors in such a way that everything snaps together nicely. Unless you have some systematic approach to solving each piece, you won't get far. I'm sure there are several good methods, with or without the help of simulations and parameter sweeps. What finally worked for us was aiming for one transconductance efficiency to put each of our gain-stage devices into moderate inversion. Once we had a target relationship between the transconductance and the drain-source current, we were able to do isolated simulations on NMOS and PMOS devices to find the device sizes. From there, we were able to get nearly all of our devices in saturation when simulating our design. Progressing from there was simply a matter of tweaking a pair of bias voltages.

Winter 2023

Constructing the Fourier series representation of real audio samples using MATLAB

Despite the unfortunate circumstances regarding this particular term of E-Fundies III with the last-minute change of professor and all, we got some good beginner's experience using MATLAB and a fun application of Fourier series.

Winter 2022